Logical Circuit Compilation

We now have all the pieces — transversal Cliffords, the $T$ gate, magic-state injection, rotation synthesis, and $T$ -count accounting. Logical circuit compilation assembles them into a pipeline that turns an abstract algorithm into a fault-tolerant schedule of physical operations with a concrete resource estimate.

The compilation pipeline

A fault-tolerant compiler typically proceeds in stages:

High-level circuit. Start from the algorithm expressed in arbitrary gates: multi-controlled operations, arbitrary single-qubit rotations, oracle calls, arithmetic.
Decompose to a universal set. Rewrite everything into Clifford+ $T$ . Multi-qubit gates become CNOT/Toffoli networks; arbitrary rotations become $\varepsilon$ -approximate Clifford+ $T$ words via the synthesis of the earlier lesson; Toffolis become their 7- $T$ decompositions.
Optimize. Cancel adjacent $T$ / $T^\dagger$ , commute Cliffords through to merge or eliminate them, and run $T$ -count/ $T$ -depth reduction passes. Because Cliffords are nearly free, optimization targets the $T$ layers specifically.
Map to the code. Choose an error-correcting code (commonly the surface code), pick a distance $d$ large enough that the per-operation logical error rate keeps the whole computation below the target failure probability, and lay out logical qubits on the physical lattice.
Schedule resources. Allocate magic-state factories to feed the $T$ gates and route logical qubits via lattice surgery or braiding. The number of factories is set by the ratio of the algorithm's $T$ -consumption rate to a factory's $T$ -production rate.

Choosing the code distance

The logical error rate of a distance- $d$ surface code below threshold scales roughly as

p_L \approx A \left( \frac{p}{p_{\text{th}}} \right)^{(d+1)/2} ,

with physical error rate $p$ and threshold $p_{\text{th}}$ . To run a computation with $N$ logical operations at overall success probability near 1, we require $N\,p_L \ll 1$ , i.e.

p_L \lesssim \frac{1}{N} .

Solving for $d$ gives the smallest distance that meets the budget; larger algorithms need larger $d$ , which costs more physical qubits per logical qubit ( $\sim 2d^2$ for the surface code).

Magic-state factories dominate

In realistic estimates, the surprise is consistent: magic-state distillation dominates both the qubit count and the runtime. A large fraction of the physical device is devoted to factories churning out high-fidelity $|A\rangle$ states, and the algorithm's wall-clock time is largely the time to produce and consume them. This is the operational meaning of " $T$ gates are expensive," and why the $T$ -count from the previous lesson is the headline number in any resource estimate.

For example, fault-tolerant resource estimates for factoring (Gidney–Ekerå) report tens of millions of physical qubits and hours of runtime, with the cost driven overwhelmingly by the billions of Toffoli/ $T$ operations and the factories that supply them.

From estimate to schedule

The compiler's final output is not just a count but a schedule: which logical qubit occupies which patch of the lattice at each time step, when each magic state is injected, and how the classically-controlled Clifford corrections are tracked (often deferred and applied "in software" via the Pauli frame). Because Clifford corrections commute through later Cliffords, many can be absorbed into measurement reinterpretation rather than executed, saving real operations.

Putting it together

You can now read a fault-tolerant resource estimate critically: the algorithm's structure sets the $T$ -count; the rotation precision $\varepsilon$ and the code distance $d$ set the multipliers; magic factories set the dominant overhead. The module checkpoint asks you to perform the central synthesis step of this pipeline — turning a target rotation into an exact Clifford+ $T$ word.